Posts by AgnosticPope

1) Message boards : Number crunching : turn off hyperthreading? (Message 43013)
Posted 2 Jul 2007 by Profile AgnosticPope
Post:
How much you do (or do not) get out of hyperthreading can also be affected by cache size. The newer Xeons come with up to 4 MB of on-chip cache per two cores (8 MB with 4 cores at the rate of 4 MB per two cores). I don't get as much out of hyperthreading on my old Xeons which had only 512 KB of cache. It is all a matter of the "hit rate" before the CPU has to stop and wait for some RAM to get fetched.

How much the cache size affects throughput is very task-specific. If you are running a computational task that takes very small amounts of memory to contain both the program and data values, the entire task can be sucked up into cache and execute without interruption if the cache is large enough. If the task is very memory-intensive, even a 4 MB cache will not be enough to make the task perform very well in a hyperthreaded environment, and in that case you would be better off disabling hyperthreading and using all the cache for a single task instead of trying to timeshare the cache between two hyperthreaded tasks (or, in the case of the newer CPUs, between four tasks on two cores).

Anyway, if heat is your motivation, then you probably would be better off just limiting your CPU utilization in your user preferences. Keep hyperthreading on and let one virtual CPU churn away on whatever task(s) you please. That will have a bigger impact on heat dissapation than just turning hyperthreading off, and will still leave the other thread(s) to do "regular work" for you.

== Bill
2) Message boards : Rosetta@home Science : Help me explain the science behind Rosetta@home! (Message 43012)
Posted 2 Jul 2007 by Profile AgnosticPope
Post:
Many people are confused about RMSD. We've read that an RMSD of zero is a perfect match with the native structure as revealed by other scientific methods. But it's really not clear what it means when I complete a model and it says it found an RMSD of 1.1 or something. And it gets more confusing when you learn that an RMSD of 1.0 could generally be "close enough" for biopharma to make use of the models.

If the protein is large, would an RMSD of 2.0 be reletively as correct as an RMSD of 1.0 for a smaller protein?

Again, an animation of a protein's native structure and then showing a twist made to one of the AAs in the chain and the resulting movement in the structure, and then perhaps more then one for a cumulative 1.0 RMSD would help visualize the concept.

It also gets confusing to understand what RMSD means when looking at a docking task. How many of the AAs in the chain are bound at the proper point to the other protein?


Question: do you understand the idea behind Root Mean Square Deviation (RMSD) in the first place?

The questions I would ask about RMSD are more like this: what is the distance metric being used to compute the variation between the two molecules (the computed and the native)? Also, how do you select the zero-reference point for measuring the distance between atomic positions for the two molecules? In other words, how do you prevent larger measured values for errors resulting from merely misaligning the two protein structures you are comparing? (This could be stated more as "how do you normalize the positioning of the two molecules being compared?)

And what are the useful values for RMSD? Do you merely need to find the lowest value? Or is there, as is suggested by the quote above, a target value underneath which the RMSD must be before the result is considered to be useful? I certainly hope it isn't 1.0 (as stated above) since only 33 of the 140+ work units currently have a "best prediction" under 1.0 RMSD. The highest value for the "best prediction" RMSD is 5.87 (as of this minute).

Once the RMSD situation was better understood, I would probably ask for a similar tutorial on the scoring method.

Anyway, if this isn't what this is about, then never mind!

== Bill
3) Message boards : Number crunching : Naive Quad Core to be released in August. (Message 42953)
Posted 1 Jul 2007 by Profile AgnosticPope
Post:
+1 to OP (back to zero). This rating stuff -1 to make it disappear for "default" users is getting to be pretty childish.

I agree that in a "Number Crunching" forum, discussions of CPU performance and how to improve the amount of "Number Crunching" going on are all right on topic and anybody who finds these discussions to be the least bit offensive should head off to one of the other forums.

== Bill
4) Message boards : Number crunching : Naive Quad Core to be released in August. (Message 42908)
Posted 30 Jun 2007 by Profile AgnosticPope
Post:
Ahhh, like all electronics...doesn't matter what you buy it will be out of date before you get your money back out of it. And if you wait for the next best release of something before you buy then you will never buy anything at all because there is always a next best thing on the horizon. A real scam these electronics makers perpetrate on us.


Actually, the planned obsolesence of the CPU makers is pretty horrid if you cared much about it. By the time you see the first system in a store someplace that has CPU X inside of it, the labs will be announcing that the 2nd or 3rd subsequent generation of later chips is "about to begin production."

The AMD announcement I quoted (above) indicated that the first version would be out in August (middle-third-quarter) but by the 4th quarter, they would have faster versions out. But the shipments to stores for pre-Christmas sales will be at best the CPU chips from August/September. And at worst, they will be the ones left over from last year that didn't sell and now need to be unloaded on an unwary buying public.

== Bill
5) Message boards : Cafe Rosetta : Last one to post here wins! #2 (Message 42884)
Posted 30 Jun 2007 by Profile AgnosticPope
Post:
I think this thread is insane. And it takes FOREVER to load, too!

== Bill
6) Message boards : Cafe Rosetta : Critical update for Intel Core CPUs is out (Message 42882)
Posted 30 Jun 2007 by Profile AgnosticPope
Post:
We are assured that no product recall will happen, and that La Intella took all appropriate steps in order to minimise public image, because if a product recall happened, Intel's credibility would be ruined for good.


These things have been going on for as long as there have been processors. This is nothing new, and as you should be well aware, AMD processors have many eratta as well.

One HUGE difference: most people who have processors with Intel eratta will get automatically updated by Microsoft. People with AMD processors are much more likely to be "out in the cold" with AMD's eratta fixes for a lot longer.

Yeah, I don't like Bill Gates either. But if I run Linux, then I'm REALLY out in the cold for processor eratta updates.

== Bill
7) Message boards : Number crunching : Naive Quad Core to be released in August. (Message 42881)
Posted 30 Jun 2007 by Profile AgnosticPope
Post:
it is official, the Naive quad core will be shipping for revenue in August.

the frequency is 2.0Ghz, the power efficency is lower than clowertown, and the performance will be way under a clowertown 3.0GHz.
It was only through reading previous postings that I could guess you were talking about an AMD announcement for a product that competes with your employer, Intel. I found the AMD announcement HERE, and it would have helped me a lot if you had linked to it yourself so that I could understand what it was you were gloating about.

Continuing to lead the shift of mainstream enterprise computing to energy-efficient processors, AMD (NYSE:AMD) announced today that Quad-Core AMD Opteron™ processors, code-named “Barcelona,” are planned for shipment in both standard and low power versions at launch later this summer. This would be the first time AMD has made both standard and low power parts immediately available as part of a new processor launch.

Additionally, AMD today updated its projected timing on “Barcelona” availability and provided additional product details. AMD expects that the processors will begin shipping for revenue in August 2007, with systems from AMD platform partners beginning to ship in September 2007. Due to its enhanced architecture – it is the world’s first x86 CPU to integrate four processing cores on a single die of silicon – Quad-Core AMD Opteron™ processors can deliver significant performance and performance-per-watt enhancements over existing processor architectures yet are designed to be backwards compatible with existing AMD Opteron platforms.

With planned availability at launch in a range of frequencies up to 2.0 Ghz, AMD expects its native quad-core processors to scale to higher frequencies in Q407 in both standard and SE (Special Edition) versions. Designed to operate within the same thermal envelopes as current generation AMD Opteron processors, AMD estimates that the new processors can provide a performance increase up to 70 percent on certain database applications and up to 40 percent on certain floating point applications, with subsequent higher frequency processors expected to significantly add to this performance advantage.


Ever since the argument over whether a 1 MHz Motorola 68000 performed better than a 1 MHz Intel 8086 (it did; by a LOT), I've learned to take with a grain of salt any claims about processor of X speed was obviously much better than processor of X-Y speed. So, just because Intel's Clovertown processor goes at 3.0 GHz and AMD's Barcelona processor goes at "up to 2.0 GHz" that should not be taken to mean that the Barcelona is necessarily a poorer-performing processor than the Clovertown processor.

I frankly feel that the reasons people buy one processor over another usually have to do with the commitment of the systems manufacturer to a particular processor manufacturer rather than any inherent search for "the best-performing processor on the market today." Most processors are idle most of the time, which is where BOINC comes in....

But I do appreciate information you supply to us about your employer. I like Intel processors more than AMD processors. But that is a bias I've grown up with over three decades of use and isn't likely to be swayed by a single product announcement. I imagine that many others feel the same way about AMD.

== Bill
8) Message boards : Number crunching : Could GPU's mean the end of DC as we know it? (Message 42802)
Posted 29 Jun 2007 by Profile AgnosticPope
Post:
Speaking of petaflops, any of these teraflop+ machines would make a large dent in the Rosetta processing as the home page says this: "TeraFLOPS estimate: 51.857"

So, all of us folks are only managing to contribute a measely 52 teraflops, more or less. So, do you think one of those supercomputer owners would run BOINC for us in the computer's spare time?

== Bill
9) Message boards : Number crunching : 80 cores, not science fiction ... it is real! 1.2 TERA! (Message 42801)
Posted 29 Jun 2007 by Profile AgnosticPope
Post:
Speaking of petaflops, any of these teraflop+ machines would make a large dent in the Rosetta processing as the home page says this: "TeraFLOPS estimate: 51.857"

So, all of us folks are only managing to contribute a measely 52 teraflops, more or less. So, do you think one of those supercomputer owners would run BOINC for us in the computer's spare time?

== Bill
10) Message boards : Number crunching : I am gonna get a multicore CPU, how does Boinc handle this?? (Message 42800)
Posted 29 Jun 2007 by Profile AgnosticPope
Post:
I have dual Xeons, each of which is hyperthreaded. But at the application level, that would be no different than a single 4-core CPU that is not hyperthreaded.

By the way, I do not believe that you need to reinstall XP to go from one CPU to up to 4 CPUs. I think that the reinstall and/or added license is only necessary if you go above some preset limit (either 4, 8, or 16 CPUs; does anybody know for sure?).

== Bill
11) Message boards : Number crunching : Could GPU's mean the end of DC as we know it? (Message 42799)
Posted 29 Jun 2007 by Profile AgnosticPope
Post:
Teraflops are so yesterday. The new upper limit is 3 petaflops, according to this BBC article:

By comparison the standard one petaflop Blue Gene/P comes with 294,912-processors connected by a high-speed, optical network.

However, it can be expanded to pack 884,736 processors, a configuration that would allow the machine to compute 3,000 trillion calculations per second (three petaflops).

...

IBM is also currently building a bespoke supercomputer for the DOE's Los Alamos National Laboratory, New Mexico.

Codenamed Roadrunner, it will be able to crunch through 1.6 thousand trillion calculations per second.

The computer will contain 16,000 standard processors working alongside 16,000 "cell" processors, designed for the PlayStation 3 (PS3).


The real question is whether BOINC software could be adapted to snuggle into arrays of cell processors. The Roadrunner architecture seems promising as the BOINC part could run in the standard processors so that only the computationally intensive code would need to be cellularized.

== Bill
12) Message boards : Number crunching : 80 cores, not science fiction ... it is real! 1.2 TERA! (Message 42798)
Posted 29 Jun 2007 by Profile AgnosticPope
Post:
From the BBC today: Supercomputer steps up the pace

Blue Gene/P is three times more potent than the current fastest machine, BlueGene/L, also built by IBM.

The latest number cruncher is capable of operating at so called "petaflop" speeds - the equivalent of 1,000 trillion calculations per second.

...

Currently the most powerful machine is Blue Gene/L, housed at the Lawrence Livermore National Laboratory in California.

Used to ensure that the US nuclear weapons stockpile remains safe and reliable, it has achieved 280.6 teraflops or trillions of calculations per second.

The machine packs 131,072 processors and is theoretically capable of reaching 367 teraflops.

By comparison the standard one petaflop Blue Gene/P comes with 294,912-processors connected by a high-speed, optical network.

However, it can be expanded to pack 884,736 processors, a configuration that would allow the machine to compute 3,000 trillion calculations per second (three petaflops).


So, teraflops are so yesterday. Give me my petaflops!

== Bill
13) Message boards : Number crunching : 80 cores, not science fiction ... it is real! 1.2 TERA! (Message 42748)
Posted 28 Jun 2007 by Profile AgnosticPope
Post:
I swear I've heard all this before. Not all on a single chip mind you, but the whole idea of arrays of processors has been kicking around for a long time, and it might be instructive to glance at a bit of history. For instance, there is THIS PAGE which brings back some old memories:

Not to be outdone, Fermilab has also used its high energy experimental physics emulators to construct a lattice QCD machine called ACPMAPS. This is a MIMD machine, using a Weitek floating-point chip set on each node. A 16-node machine, with a peak rate of , was finished in 1989. A 256-node machine, arranged as a hypercube of crates, with eight nodes communicating through a crossbar in each crate, was completed in 1991 [Fischler:92a]. It has a peak rate of , and a sustained rate of about for QCD. An upgrade of ACPMAPS is planned, with the number of nodes being increased and the present processors being replaced with two Intel i860 chips per node, giving a peak performance of per node. These performance figures are summarized in Table 4.3. (The ``real'' performances are the actual performances obtained on QCD codes.)

Major calculations have also been performed on commercial SIMD machines, first on the ICL Distributed Array Processor (DAP) at Edinburgh University during the period from 1982 to 1987 [Wallace:84a], and now on the TMC Connection Machine (CM-2); and on commercial distributed memory MIMD machines like the nCUBE hypercube and Intel Touchstone Delta machines at Caltech. Currently, the Connection Machine is the most powerful commercial QCD machine available, running full QCD at a sustained rate of approximately on a CM-2 [Baillie:89e], [Brickner:91b]. However, simulations have recently been performed at a rate of on the experimental Intel Touchstone Delta at Caltech. This is a MIMD machine made up of 528 Intel i860 processors connected in a two-dimensional mesh, with a peak performance of for 32-bit arithmetic. These results compare favorably with performances on traditional (vector) supercomputers. Highly optimized QCD code runs at about per processor on a CRAY Y-MP, or on a fully configured eight-processor machine.

The generation of commercial parallel supercomputers, represented by the CM-5 and the Intel Paragon, have a peak performance of over . There was a proposal for the development of a TeraFLOPS parallel supercomputer for QCD and other numerically intensive simulations [Christ:91a], [Aoki:91a]. The goal was to build a machine based on the CM-5 architecture in collaboration with Thinking Machines Corporation, which would be ready by 1995 at a cost of around $40 million.


From the above you can get the idea that Intel has been at this game for a while. The commercial version of the Touchstone system was the Intel Paragon XP, which boasted all of 75 M-Flops per i860 RISC CPU. the article reports that the system of a decade or so ago could scale up to about 280 G-Flops, but nobody could afford to buy (or write software for) a system of that size, so the pieces were broken up and sold individually.

These things were huge clunkers. A 256-node Intel Hypercube was the size of a closet (or a tall and deep rack of datacenter equipment of any flavor if that relates better for you).

So, lets get real here: even if Intel gets to "first silicon" on an actual product someday soon, it is going to be years and years before the software is available to use one of these things properly, and the price tag is bound to be many thousands of dollars for a server-type chip (which presumably could actually use an 80-thread CPU). Remember the first Itaniums a few years back? Like that, only worse!

That doesn't mean I don't think this is neat. But I'm not holding my breath, or holding off on buying a 4 or 8 core Xeon if I ever get the money. I know from past experience that large-scale multiprocessing is Trouble with a capital-T and so I won't be volunteering to purchase the bleeding-edge of that technology!

== Bill
14) Message boards : Number crunching : When is "one more project" one too many? (Message 42746)
Posted 28 Jun 2007 by Profile AgnosticPope
Post:
The other approach to take is to look at the outcome the projects are working toward and decide which is most in-line with your liking.


This is similar to my own philosophy. I have a dual Xeon, hyperthreaded, so that looks like it has 4 CPUs. I allocate 2 threads to Rosetta as some of the diseases are personal to me. I keep one thread on SETI for old time's sake, and when I could not get any SETI or Rosetta work a while back, I added Einstein for the fourth thread (in place of SETI) as it was also an astronomy search. YMMV of course.

== Bill
15) Message boards : Number crunching : Could GPU's mean the end of DC as we know it? (Message 42745)
Posted 28 Jun 2007 by Profile AgnosticPope
Post:
The problem at the moment is getting enough people interested and "in the know" about it.


I work at a "major corporation" that has "more than 50,000 employees," each of whom has a fairly substantial laptop or desktop computer. By corporate policy we are all absolutely prohibited from running "third party" applications on our computers.

So, if anybody has any good contacts with the Boards of Directors of any good Fortune 500 companies, most of whom would be in a similar situation, but most of whom encourage employees to undertake "charity work" using some company supplied resources, how about getting said Boards of Directors to allow or even encourage employees to use BOINC on their work computers?

If you want more "bang for your buck" of time spent advocating for some cause, that would be the path I would recommend.

== Bill

16) Message boards : Number crunching : Could GPU's mean the end of DC as we know it? (Message 42594)
Posted 25 Jun 2007 by Profile AgnosticPope
Post:
About a decade ago, CPUs were on the road to extinction because RISC processors were so much better. Apple went with a RISC design for its MAC. Then, lo and behold, a decade later Apple went back to Intel and the "classic" CPU machine.

So, the GPU folks have developed a technique for doing 10x the floating point calculations? Well, my guess is that the same technique could be rather easily incorporated back into a CPU in a generation or two at the most.

The market still demands CPUs because the market wants to buy a single machine that runs "everything" in one box. Yes, there will be perturbations in the market from time-to-time as the RISC and GPU break-outs clearly demonstrate. But I think we are a long way away from counting the CPU out!

Oh, and then there is THIS:
ENGINEERS from AMD and ATI companies are going to start working on a unified chip that will have GPU and CPU on a same silicon. We learned this from high ranking sources close to the companies, more than once.
Don’t get too excited as it will take at least eighteen months to see such a dream come true.

This is the ultimate OEM chip, as it will be the cheapest way to have the memory controller, chipset, graphics function and CPU on a single chip. This will be the ultimate integration as will decrease the cost of platform and will make even cheaper PCs possible.

CPUs are being shrunk to a 65 nanometre process as we speak and the graphics guys are expected to migrate to this process next year. The graphics firms are still playing with 80 nanometre but will ultimately go to 65 nanometre later next year.

DAAMIT engineers will be looking to shift to 65 nanometre if not even to 45 nanometre to make such a complex chip as a CPU/GPU possible.

We still don’t know whether they are going to put a CPU on a GPU or a GPU or a CPU but either way will give you the same product.


See what I mean?

== Bill
17) Message boards : Number crunching : Effect of Memory on performance (Message 42077)
Posted 11 Jun 2007 by Profile AgnosticPope
Post:
I believe DIMMs, which refers to a general construction of the RAM module, is being confused with DDR, a more specific type of RAM which has higher throughput but requires matched pairs of modules.
Actually, either of those may work better with,or even require, matched pairs of memory modules. I recall needing matched pairs as far back as the DIMM modules needed for Pentium-II "brick" CPUs.

It is all a function of the motherboard design, which in turn is a function of the particular chip set being used as the main control logic for the motherboard. Some chip sets only need one set of DIMM or DDR or whatever kind of memory, but those chip sets are frequently limited to just a 32 bit (or 36 bit with ECC/Parity) data path, although some other chip sets may allow for you to put in either a single memory module or some number of matched pairs. For a 64 bit data path, you need two 32 bit wide memory modules of some particular type or another. This led to the development of much larger memory modules that have a 64 bit data path (or 72 bits with ECC/Parity). And then we get to the Mac Pro, which the original poster has, and that motherboard is designed for a 128 bit (or 144 bit with ECC/Parity) data path, which is twice as wide again.

Now, for the original poster, who is running a Mac Pro with four cores, the recommended memory is
Each memory slot can hold DDR2 PC2-5300 with a maximum of 4096MB per slot. (Not to exceed manufacturer supported memory.)

Maximum Memory: 32768MB
USB Support: 2.x Compliant
Standard Memory: 1024MB removable
Slots: 8 (4 banks of 2)
And, Crucial recommends pairs of those units, which are:
Module Size: 2GB kit (1GBx2)
Package: 240-pin DIMM
Feature: DDR2 PC2-5300
Specs: DDR2 PC2-5300 • CL=5 • Fully Buffered • ECC • DDR2-667 • 1.8V • 128Meg x 72
So, you can see from the above that he needs 240-pin DIMM units, and they do need to be in pairs. Crucial does not offer a 1 GB upgrade (which is presumably a pair of 512 MB modules). What you may get where you live is another question entirely.

Finally, for whatever it is worth, Crucial claims that the Mac Pro does not support dual channel memory mode (which you are presumably calling quad channel mode).

== Bill
18) Message boards : Number crunching : NO WORK (Message 40825)
Posted 12 May 2007 by Profile AgnosticPope
Post:
I have only been running two projects: SETI and Rosetta. SETI has been offline for over a week now, so I've only been running Rosetta for the past week. I bet the folks here at Baker Labs didn't account for people like me who would use up a lot more work units beause SETI was down.

I guess I need to look for a third project to join. :(

== Bill






©2024 University of Washington
https://www.bakerlab.org